Clean up extension and update repository references

- Removed duplicate WASM files and build artifacts
- Cleaned up test files and temporary files
- Updated all grammar repositories with READMEs and .gitignore
- All repositories now have proper documentation and are clean
This commit is contained in:
2025-09-11 11:27:38 -04:00
parent c231dbfd27
commit ec1795eaaa
18 changed files with 8 additions and 43 deletions

Submodule grammars/compare_output updated: 51fd3069d1...7d2f99db03

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Submodule grammars/hack_assembly updated: 74f44fa77e...a2442f53ea

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Submodule grammars/hack_binary updated: d408c50827...c4034857c7

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Submodule grammars/hdl updated: 2199fdf1d3...36da989403

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Submodule grammars/jack updated: 1a617413ea...c2d0dbbe79

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Submodule grammars/test_script updated: 909bf1dfe8...0a17b7ae9a

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Submodule grammars/vm updated: 615f50fc59...85399605df

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Submodule grammars/xml updated: 1e86bc6d16...4c8286def0

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@@ -1,6 +0,0 @@
@2
D=A
@3
D=D+A
@0
M=D

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// Test HDL file for syntax highlighting
/**
* Example chip demonstrating various HDL syntax patterns
*/
CHIP TestChip {
IN in[16], // 16-bit input
load, // control signal
address[3]; // 3-bit address
OUT out[16], // 16-bit output
ready; // status signal
PARTS:
// Built-in chip reference
BUILTIN ALU;
// Clocked body
CLOCKED DFF, Register;
// Part instantiation with connections
Mux16(a=in, b=out, sel=load, out=muxOut);
// Register with bus connections
Register(in=muxOut, load=load, out=out);
// Complex connection
ALU(x=in, y=out, zx=load, nx=false, zy=true, ny=false,
f=true, no=false, out=aluOut, zr=zero, ng=negative);
}