soconnor e389939297 Fix ALU: Properly split output for flag computation ...

- Use out=out, out[0..7]=outLow, out[8..15]=outHigh, out[15]=sign syntax
- Compute flags using internal signals outLow, outHigh, sign
- Avoids HDL restriction on using output pins as inputs

2025-09-01 15:05:16 -04:00

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Initial commit: Project 0 completed, Project 1 skeleton files

2025-08-27 19:05:53 +02:00

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Remove redundant comments from logic gate HDL files

2025-08-30 19:45:03 -04:00

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Fix ALU: Properly split output for flag computation

2025-09-01 15:05:16 -04:00

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