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- Removed invalid finalout internal bus - Use out[0..7], out[8..15], out[15] directly for flag computation - Fixes HDL sub-bus restriction error
18 lines
512 B
Plaintext
18 lines
512 B
Plaintext
// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: projects/2/FullAdder.hdl
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/**
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* Computes the sum of three bits.
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*/
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CHIP FullAdder {
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IN a, b, c; // 1-bit inputs
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OUT sum, // Right bit of a + b + c
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carry; // Left bit of a + b + c
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PARTS:
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HalfAdder(a=a, b=b, sum=tmp1, carry=tmp2);
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HalfAdder(a=tmp1, b=c, sum=sum, carry=tmp3);
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Or(a=tmp2, b=tmp3, out=carry);
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}
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