mirror of
https://github.com/soconnor0919/eceg431.git
synced 2025-12-11 22:54:43 -05:00
- Removed invalid finalout internal bus - Use out[0..7], out[8..15], out[15] directly for flag computation - Fixes HDL sub-bus restriction error
76 lines
2.4 KiB
Plaintext
76 lines
2.4 KiB
Plaintext
// This file is part of www.nand2tetris.org
|
|
// and the book "The Elements of Computing Systems"
|
|
// by Nisan and Schocken, MIT Press.
|
|
// File name: projects/2/ALU.hdl
|
|
/**
|
|
* ALU (Arithmetic Logic Unit):
|
|
* Computes out = one of the following functions:
|
|
* 0, 1, -1,
|
|
* x, y, !x, !y, -x, -y,
|
|
* x + 1, y + 1, x - 1, y - 1,
|
|
* x + y, x - y, y - x,
|
|
* x & y, x | y
|
|
* on the 16-bit inputs x, y,
|
|
* according to the input bits zx, nx, zy, ny, f, no.
|
|
* In addition, computes the two output bits:
|
|
* if (out == 0) zr = 1, else zr = 0
|
|
* if (out < 0) ng = 1, else ng = 0
|
|
*/
|
|
// Implementation: Manipulates the x and y inputs
|
|
// and operates on the resulting values, as follows:
|
|
// if (zx == 1) sets x = 0 // 16-bit constant
|
|
// if (nx == 1) sets x = !x // bitwise not
|
|
// if (zy == 1) sets y = 0 // 16-bit constant
|
|
// if (ny == 1) sets y = !y // bitwise not
|
|
// if (f == 1) sets out = x + y // integer 2's complement addition
|
|
// if (f == 0) sets out = x & y // bitwise and
|
|
// if (no == 1) sets out = !out // bitwise not
|
|
|
|
CHIP ALU {
|
|
IN
|
|
x[16], y[16], // 16-bit inputs
|
|
zx, // zero the x input?
|
|
nx, // negate the x input?
|
|
zy, // zero the y input?
|
|
ny, // negate the y input?
|
|
f, // compute (out = x + y) or (out = x & y)?
|
|
no; // negate the out output?
|
|
OUT
|
|
out[16], // 16-bit output
|
|
zr, // if (out == 0) equals 1, else 0
|
|
ng; // if (out < 0) equals 1, else 0
|
|
|
|
PARTS:
|
|
// handle zx (zero x)
|
|
Mux16(a=x, b=false, sel=zx, out=x1);
|
|
|
|
// handle nx (negate x)
|
|
Not16(in=x1, out=notx1);
|
|
Mux16(a=x1, b=notx1, sel=nx, out=x2);
|
|
|
|
// handle zy (zero y)
|
|
Mux16(a=y, b=false, sel=zy, out=y1);
|
|
|
|
// handle ny (negate y)
|
|
Not16(in=y1, out=noty1);
|
|
Mux16(a=y1, b=noty1, sel=ny, out=y2);
|
|
|
|
// handle f (add or and)
|
|
Add16(a=x2, b=y2, out=addout);
|
|
And16(a=x2, b=y2, out=andout);
|
|
Mux16(a=andout, b=addout, sel=f, out=fout);
|
|
|
|
// handle no (negate out)
|
|
Not16(in=fout, out=notfout);
|
|
Mux16(a=fout, b=notfout, sel=no, out=out);
|
|
|
|
// compute zr (zero flag)
|
|
Or8Way(in=out[0..7], out=tmp1);
|
|
Or8Way(in=out[8..15], out=tmp2);
|
|
Or(a=tmp1, b=tmp2, out=notzr);
|
|
Not(in=notzr, out=zr);
|
|
|
|
// compute ng (negative flag)
|
|
And(a=out[15], b=true, out=ng);
|
|
}
|