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102 lines
4.9 KiB
Plaintext
102 lines
4.9 KiB
Plaintext
// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: projects/5/CPU.hdl
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/**
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* The Hack Central Processing unit (CPU).
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* Parses the binary code in the instruction input and executes it according to the
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* Hack machine language specification. In the case of a C-instruction, computes the
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* function specified by the instruction. If the instruction specifies to read a memory
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* value, the inM input is expected to contain this value. If the instruction specifies
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* to write a value to the memory, sets the outM output to this value, sets the addressM
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* output to the target address, and asserts the writeM output (when writeM = 0, any
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* value may appear in outM).
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* If the reset input is 0, computes the address of the next instruction and sets the
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* pc output to that value. If the reset input is 1, sets pc to 0.
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* Note: The outM and writeM outputs are combinational: they are affected by the
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* instruction's execution during the current cycle. The addressM and pc outputs are
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* clocked: although they are affected by the instruction's execution, they commit to
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* their new values only in the next cycle.
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*/
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CHIP CPU {
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IN inM[16], // M value input (M = contents of RAM[A])
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instruction[16], // Instruction for execution
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reset; // Signals whether to re-start the current
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// program (reset==1) or continue executing
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// the current program (reset==0).
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OUT outM[16], // M value output
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writeM, // Write to M?
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addressM[15], // Address in data memory (of M)
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pc[15]; // address of next instruction
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PARTS:
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// CPU implements Hack machine language from book c4/c5
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// step 1: decode instruction type (addr instruction "A" vs compute instruction "C")
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// step 2: handle A reg load and ALU input sel
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// step 3: handle D reg and ALU comp
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// step 4: handle mem write and jump logic
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// step 5: update PC
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//
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// Instruction formats (for reference, duh):
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// A-instruction: 0vvvvvvvvvvvvvvv (load 15-bit value into A)
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// C-instruction: 111ACCCCCCDDDJJJ
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// A = ALU input sel (0=A, 1=M)
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// CCCCCC = ALU control bits
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// DDD = destination (A=bit5, D=bit4, M=bit3)
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// JJJ = jump condition (bit2=j(ump)l(ess)t(han), bit1=j(ump)eq(ual), bit0=j(ump)g(reater)t(han))
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// STEP 1
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// decode instruction type
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Not(in=instruction[15], out=aInstr); // aInstr = 1 when instruction[15] = 0
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Not(in=aInstr, out=cInstr); // cInstr = 1 when instruction[15] = 1
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// STEP 2
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// pick A reg input (instruction or ALU out)
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Mux16(a=instruction, b=aluOut, sel=cInstr, out=aRegIn); // A-instr uses instruction, C-instr uses ALU
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// load A reg if A-instruction or dest A
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Or(a=aInstr, b=instruction[5], out=loadA); // load A if A-instr or C-instr with A dest
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ARegister(in=aRegIn, load=loadA, out=aRegOut); // A reg stores addr/value
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// pick ALU y input (A reg or M)
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Mux16(a=aRegOut, b=inM, sel=instruction[12], out=aluY); // instruction[12] picks A vs M for ALU
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// STEP 3
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// load D reg if C-instruction with dest D
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And(a=cInstr, b=instruction[4], out=loadD); // loadD = 1 when C-instr and dest D
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DRegister(in=aluOut, load=loadD, out=dRegOut); // D reg stores data
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// compute ALU operation
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ALU(x=dRegOut, y=aluY, zx=instruction[11], nx=instruction[10], // ALU control from instruction[11..6]
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zy=instruction[9], ny=instruction[8], f=instruction[7],
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no=instruction[6], out=aluOut, zr=zr, ng=ng);
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// STEP 4
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// writeM set if C-instruction with dest M
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And(a=cInstr, b=instruction[3], out=writeM); // writeM = 1 when C-instr and dest M
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// compute jump conditions
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Not(in=zr, out=notZr); // notZr = 1 when ALU out is not zero
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Not(in=ng, out=notNg); // notNg = 1 when ALU out is not negative
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And(a=notZr, b=notNg, out=pos); // pos = 1 when ALU out is positive
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And(a=instruction[2], b=ng, out=jlt); // jlt = 1 when jump if less than and ALU < 0
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And(a=instruction[1], b=zr, out=jeq); // jeq = 1 when jump if equal and ALU = 0
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And(a=instruction[0], b=pos, out=jgt); // jgt = 1 when jump if greater and ALU > 0
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Or(a=jlt, b=jeq, out=jle); // combine jlt and jeq
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Or(a=jle, b=jgt, out=jump); // combine all jump conditions
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And(a=cInstr, b=jump, out=pcLoad); // only jump on C-instructions
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// STEP 5
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// program counter
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PC(in=aRegOut, load=pcLoad, inc=true, reset=reset, out[0..14]=pc); // PC jumps to A reg or increments
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// OUT
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// connect outputs
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Or16(a=false, b=aluOut, out=outM); // outM gets ALU output
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Or16(a=false, b=aRegOut, out[0..14]=addressM); // addressM gets A register (15 bits)
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}
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