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Author SHA1 Message Date
soconnor f43ce1f964 Remove redundant comments from logic gate HDL files 2025-08-30 19:45:03 -04:00
soconnor 396902dee7 Replace De Morgan's law comment with basic Or logic description 2025-08-30 19:23:29 -04:00
soconnor c39ce212b4 Simplify comments to be more concise and student-like 
- Removed verbose explanations
- Made comments shorter and more casual
- Focus on key concepts rather than formal descriptions
 2025-08-28 15:11:48 +02:00
soconnor ecdc6ab2bc Refactor: Use simple tmp variable names instead of descriptive ones 
- Changed nandOut -> tmp
- Changed notA, notB -> tmp1, tmp2
- Changed descriptive names -> tmp1, tmp2, tmp3, etc.

Makes code cleaner and more concise while maintaining functionality.
 2025-08-28 14:39:07 +02:00
soconnor 085a90e4c8 Project 1 Complete: All 15 logic gates implemented 
✅ Basic Gates (6):
- Not, And, Or, Xor, Mux, DMux

✅ 16-bit Gates (4):
- Not16, And16, Or16, Mux16

✅ Multi-way Gates (5):
- Or8Way, Mux4Way16, Mux8Way16, DMux4Way, DMux8Way

All gates built using only NAND gates and previously implemented gates.
 2025-08-28 13:19:52 +02:00
soconnor 88b4cc4ad9 Implement multi-way gates: Or8Way, Mux4Way16, Mux8Way16, DMux4Way, DMux8Way 2025-08-28 13:19:40 +02:00
soconnor 93f730d0ce Implement 16-bit logic gates: Not16, And16, Or16, Mux16 2025-08-27 19:08:17 +02:00
soconnor ad5f774ae0 Implement basic logic gates: Not, And, Or, Xor, Mux, DMux 2025-08-27 19:07:20 +02:00
soconnor beb668806a Initial commit: Project 0 completed, Project 1 skeleton files 2025-08-27 19:05:53 +02:00