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Remove redundant comments from logic gate HDL files

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Sean O'Connor
2025-08-30 19:45:03 -04:00
parent 396902dee7
commit f43ce1f964
14 changed files with 10 additions and 13 deletions
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01/Or8Way.hdl
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@@ -11,7 +11,6 @@ CHIP Or8Way {
OUT out;
PARTS:
// Chain Or gates
Or(a=in[0], b=in[1], out=tmp1);
Or(a=in[2], b=in[3], out=tmp2);
Or(a=in[4], b=in[5], out=tmp3);