From f43ce1f9646d46242a458a0fbd952aeac23e68e3 Mon Sep 17 00:00:00 2001 From: Sean O'Connor Date: Sat, 30 Aug 2025 19:45:03 -0400 Subject: [PATCH] Remove redundant comments from logic gate HDL files --- 01/And16.hdl | 1 - 01/DMux.hdl | 1 - 01/DMux4Way.hdl | 1 - 01/DMux4Way.out | 9 +++++++++ 01/DMux8Way.hdl | 1 - 01/Mux.hdl | 1 - 01/Mux16.hdl | 1 - 01/Mux4Way16.hdl | 1 - 01/Mux8Way16.hdl | 1 - 01/Not.hdl | 2 +- 01/Not16.hdl | 1 - 01/Or16.hdl | 1 - 01/Or8Way.hdl | 1 - 01/Xor.hdl | 1 - 14 files changed, 10 insertions(+), 13 deletions(-) create mode 100644 01/DMux4Way.out diff --git a/01/And16.hdl b/01/And16.hdl index 6a4d3a4..4eccfed 100644 --- a/01/And16.hdl +++ b/01/And16.hdl @@ -12,7 +12,6 @@ CHIP And16 { OUT out[16]; PARTS: - // And each bit And(a=a[0], b=b[0], out=out[0]); And(a=a[1], b=b[1], out=out[1]); And(a=a[2], b=b[2], out=out[2]); diff --git a/01/DMux.hdl b/01/DMux.hdl index 99997a9..dfe0b1e 100644 --- a/01/DMux.hdl +++ b/01/DMux.hdl @@ -12,7 +12,6 @@ CHIP DMux { OUT a, b; PARTS: - // sel=0 sends to a, sel=1 sends to b Not(in=sel, out=tmp); And(a=in, b=tmp, out=a); And(a=in, b=sel, out=b); diff --git a/01/DMux4Way.hdl b/01/DMux4Way.hdl index b105867..70028d6 100644 --- a/01/DMux4Way.hdl +++ b/01/DMux4Way.hdl @@ -14,7 +14,6 @@ CHIP DMux4Way { OUT a, b, c, d; PARTS: - // Two levels of DMux DMux(in=in, sel=sel[1], a=tmp1, b=tmp2); DMux(in=tmp1, sel=sel[0], a=a, b=b); DMux(in=tmp2, sel=sel[0], a=c, b=d); diff --git a/01/DMux4Way.out b/01/DMux4Way.out new file mode 100644 index 0000000..7734e2a --- /dev/null +++ b/01/DMux4Way.out @@ -0,0 +1,9 @@ +|in | sel | a | b | c | d | +| 0 | 00 | 0 | 0 | 0 | 0 | +| 0 | 01 | 0 | 0 | 0 | 0 | +| 0 | 10 | 0 | 0 | 0 | 0 | +| 0 | 11 | 0 | 0 | 0 | 0 | +| 1 | 00 | 1 | 0 | 0 | 0 | +| 1 | 01 | 0 | 1 | 0 | 0 | +| 1 | 10 | 0 | 0 | 1 | 0 | +| 1 | 11 | 0 | 0 | 0 | 1 | diff --git a/01/DMux8Way.hdl b/01/DMux8Way.hdl index 7bb487e..b598823 100644 --- a/01/DMux8Way.hdl +++ b/01/DMux8Way.hdl @@ -18,7 +18,6 @@ CHIP DMux8Way { OUT a, b, c, d, e, f, g, h; PARTS: - // One DMux + two DMux4Way DMux(in=in, sel=sel[2], a=tmp1, b=tmp2); DMux4Way(in=tmp1, sel=sel[0..1], a=a, b=b, c=c, d=d); DMux4Way(in=tmp2, sel=sel[0..1], a=e, b=f, c=g, d=h); diff --git a/01/Mux.hdl b/01/Mux.hdl index 491f694..422cae7 100644 --- a/01/Mux.hdl +++ b/01/Mux.hdl @@ -11,7 +11,6 @@ CHIP Mux { OUT out; PARTS: - // sel=0 picks a, sel=1 picks b Not(in=sel, out=tmp1); And(a=a, b=tmp1, out=tmp2); And(a=b, b=sel, out=tmp3); diff --git a/01/Mux16.hdl b/01/Mux16.hdl index f44b4b9..443d3cc 100644 --- a/01/Mux16.hdl +++ b/01/Mux16.hdl @@ -12,7 +12,6 @@ CHIP Mux16 { OUT out[16]; PARTS: - // Mux each bit Mux(a=a[0], b=b[0], sel=sel, out=out[0]); Mux(a=a[1], b=b[1], sel=sel, out=out[1]); Mux(a=a[2], b=b[2], sel=sel, out=out[2]); diff --git a/01/Mux4Way16.hdl b/01/Mux4Way16.hdl index b217e73..8b62e8f 100644 --- a/01/Mux4Way16.hdl +++ b/01/Mux4Way16.hdl @@ -14,7 +14,6 @@ CHIP Mux4Way16 { OUT out[16]; PARTS: - // Two levels of Mux16 Mux16(a=a, b=b, sel=sel[0], out=tmp1); Mux16(a=c, b=d, sel=sel[0], out=tmp2); Mux16(a=tmp1, b=tmp2, sel=sel[1], out=out); diff --git a/01/Mux8Way16.hdl b/01/Mux8Way16.hdl index 57b73f4..57c541b 100644 --- a/01/Mux8Way16.hdl +++ b/01/Mux8Way16.hdl @@ -20,7 +20,6 @@ CHIP Mux8Way16 { OUT out[16]; PARTS: - // Two Mux4Way16 + one Mux16 Mux4Way16(a=a, b=b, c=c, d=d, sel=sel[0..1], out=tmp1); Mux4Way16(a=e, b=f, c=g, d=h, sel=sel[0..1], out=tmp2); Mux16(a=tmp1, b=tmp2, sel=sel[2], out=out); diff --git a/01/Not.hdl b/01/Not.hdl index 049ff67..eab8a61 100644 --- a/01/Not.hdl +++ b/01/Not.hdl @@ -11,6 +11,6 @@ CHIP Not { OUT out; PARTS: - // Not = Nand with same input + // Not = Nand same input Nand(a=in, b=in, out=out); } diff --git a/01/Not16.hdl b/01/Not16.hdl index 3f74e4e..1a035be 100644 --- a/01/Not16.hdl +++ b/01/Not16.hdl @@ -12,7 +12,6 @@ CHIP Not16 { OUT out[16]; PARTS: - // Not each bit Not(in=in[0], out=out[0]); Not(in=in[1], out=out[1]); Not(in=in[2], out=out[2]); diff --git a/01/Or16.hdl b/01/Or16.hdl index 72dfb80..11adedf 100644 --- a/01/Or16.hdl +++ b/01/Or16.hdl @@ -12,7 +12,6 @@ CHIP Or16 { OUT out[16]; PARTS: - // Or each bit Or(a=a[0], b=b[0], out=out[0]); Or(a=a[1], b=b[1], out=out[1]); Or(a=a[2], b=b[2], out=out[2]); diff --git a/01/Or8Way.hdl b/01/Or8Way.hdl index 3cfe6bb..498820e 100644 --- a/01/Or8Way.hdl +++ b/01/Or8Way.hdl @@ -11,7 +11,6 @@ CHIP Or8Way { OUT out; PARTS: - // Chain Or gates Or(a=in[0], b=in[1], out=tmp1); Or(a=in[2], b=in[3], out=tmp2); Or(a=in[4], b=in[5], out=tmp3); diff --git a/01/Xor.hdl b/01/Xor.hdl index 1723bcb..c6229a8 100644 --- a/01/Xor.hdl +++ b/01/Xor.hdl @@ -11,7 +11,6 @@ CHIP Xor { OUT out; PARTS: - // Xor = (a AND !b) OR (!a AND b) Not(in=a, out=tmp1); Not(in=b, out=tmp2); And(a=a, b=tmp2, out=tmp3);