Remove redundant comments from logic gate HDL files

This commit is contained in:
2025-08-30 19:45:03 -04:00
parent 396902dee7
commit f43ce1f964
14 changed files with 10 additions and 13 deletions

View File

@@ -20,7 +20,6 @@ CHIP Mux8Way16 {
OUT out[16];
PARTS:
// Two Mux4Way16 + one Mux16
Mux4Way16(a=a, b=b, c=c, d=d, sel=sel[0..1], out=tmp1);
Mux4Way16(a=e, b=f, c=g, d=h, sel=sel[0..1], out=tmp2);
Mux16(a=tmp1, b=tmp2, sel=sel[2], out=out);