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Remove redundant comments from logic gate HDL files

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Sean O'Connor
2025-08-30 19:45:03 -04:00
parent 396902dee7
commit f43ce1f964
14 changed files with 10 additions and 13 deletions
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01/Mux.hdl
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@@ -11,7 +11,6 @@ CHIP Mux {
OUT out;
PARTS:
// sel=0 picks a, sel=1 picks b
Not(in=sel, out=tmp1);
And(a=a, b=tmp1, out=tmp2);
And(a=b, b=sel, out=tmp3);