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Remove redundant comments from logic gate HDL files

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Sean O'Connor
2025-08-30 19:45:03 -04:00
parent 396902dee7
commit f43ce1f964
14 changed files with 10 additions and 13 deletions
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01/DMux8Way.hdl
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@@ -18,7 +18,6 @@ CHIP DMux8Way {
OUT a, b, c, d, e, f, g, h;
PARTS:
// One DMux + two DMux4Way
DMux(in=in, sel=sel[2], a=tmp1, b=tmp2);
DMux4Way(in=tmp1, sel=sel[0..1], a=a, b=b, c=c, d=d);
DMux4Way(in=tmp2, sel=sel[0..1], a=e, b=f, c=g, d=h);