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Remove redundant comments from logic gate HDL files

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Sean O'Connor
2025-08-30 19:45:03 -04:00
parent 396902dee7
commit f43ce1f964
14 changed files with 10 additions and 13 deletions
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01/DMux.hdl
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@@ -12,7 +12,6 @@ CHIP DMux {
OUT a, b;
PARTS:
// sel=0 sends to a, sel=1 sends to b
Not(in=sel, out=tmp);
And(a=in, b=tmp, out=a);
And(a=in, b=sel, out=b);