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Fix ALU: Properly split output for flag computation

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- Use out=out, out[0..7]=outLow, out[8..15]=outHigh, out[15]=sign syntax
- Compute flags using internal signals outLow, outHigh, sign
- Avoids HDL restriction on using output pins as inputs
This commit is contained in:
Sean O'Connor
2025-09-01 15:05:16 -04:00
parent b0c57a8a7e
commit e389939297
1 changed files with 4 additions and 4 deletions
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8
02/ALU.hdl
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@@ -62,14 +62,14 @@ CHIP ALU {
// handle no (negate out) // handle no (negate out)
Not16(in=fout, out=notfout); Not16(in=fout, out=notfout);
Mux16(a=fout, b=notfout, sel=no, out=out); Mux16(a=fout, b=notfout, sel=no, out=out, out[0..7]=outLow, out[8..15]=outHigh, out[15]=sign);
// compute zr (zero flag) // compute zr (zero flag)
Or8Way(in=out[0..7], out=tmp1); Or8Way(in=outLow, out=tmp1);
Or8Way(in=out[8..15], out=tmp2); Or8Way(in=outHigh, out=tmp2);
Or(a=tmp1, b=tmp2, out=notzr); Or(a=tmp1, b=tmp2, out=notzr);
Not(in=notzr, out=zr); Not(in=notzr, out=zr);
// compute ng (negative flag) // compute ng (negative flag)
And(a=out[15], b=true, out=ng); And(a=sign, b=true, out=ng);
} }