Fix ALU: Properly split output for flag computation

- Use out=out, out[0..7]=outLow, out[8..15]=outHigh, out[15]=sign syntax
- Compute flags using internal signals outLow, outHigh, sign
- Avoids HDL restriction on using output pins as inputs

02/ALU.hdl

@@ -62,14 +62,14 @@ CHIP ALU {
 
     // handle no (negate out)
     Not16(in=fout, out=notfout);
-    Mux16(a=fout, b=notfout, sel=no, out=out);
+    Mux16(a=fout, b=notfout, sel=no, out=out, out[0..7]=outLow, out[8..15]=outHigh, out[15]=sign);
 
     // compute zr (zero flag)
-    Or8Way(in=out[0..7], out=tmp1);
-    Or8Way(in=out[8..15], out=tmp2);
+    Or8Way(in=outLow, out=tmp1);
+    Or8Way(in=outHigh, out=tmp2);
     Or(a=tmp1, b=tmp2, out=notzr);
     Not(in=notzr, out=zr);
 
     // compute ng (negative flag)
-    And(a=out[15], b=true, out=ng);
+    And(a=sign, b=true, out=ng);
 }