mirror of
https://github.com/soconnor0919/eceg431.git
synced 2025-12-11 22:54:43 -05:00
Fix ALU: Use out pin directly instead of internal finalout bus
- Removed invalid finalout internal bus - Use out[0..7], out[8..15], out[15] directly for flag computation - Fixes HDL sub-bus restriction error
This commit is contained in:
@@ -11,7 +11,6 @@ CHIP FullAdder {
|
||||
carry; // Left bit of a + b + c
|
||||
|
||||
PARTS:
|
||||
// Two half adders + OR gate
|
||||
HalfAdder(a=a, b=b, sum=tmp1, carry=tmp2);
|
||||
HalfAdder(a=tmp1, b=c, sum=sum, carry=tmp3);
|
||||
Or(a=tmp2, b=tmp3, out=carry);
|
||||
|
||||
Reference in New Issue
Block a user