Implement Project 2: Arithmetic Logic Unit

 HalfAdder: XOR for sum, AND for carry
 FullAdder: Two half adders + OR
 Add16: Chain of 16 full adders with carry
 Inc16: Add16 with constant 1
 ALU: Complete arithmetic logic unit with all operations

Used concise, student-style comments throughout.
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2025-08-30 19:49:23 -04:00
parent 4563dd234b
commit 2b3da7a171
5 changed files with 65 additions and 13 deletions

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@@ -11,5 +11,21 @@ CHIP Add16 {
OUT out[16];
PARTS:
//// Replace this comment with your code.
}
// Chain 16 FullAdders with carry propagation
HalfAdder(a=a[0], b=b[0], sum=out[0], carry=c0);
FullAdder(a=a[1], b=b[1], c=c0, sum=out[1], carry=c1);
FullAdder(a=a[2], b=b[2], c=c1, sum=out[2], carry=c2);
FullAdder(a=a[3], b=b[3], c=c2, sum=out[3], carry=c3);
FullAdder(a=a[4], b=b[4], c=c3, sum=out[4], carry=c4);
FullAdder(a=a[5], b=b[5], c=c4, sum=out[5], carry=c5);
FullAdder(a=a[6], b=b[6], c=c5, sum=out[6], carry=c6);
FullAdder(a=a[7], b=b[7], c=c6, sum=out[7], carry=c7);
FullAdder(a=a[8], b=b[8], c=c7, sum=out[8], carry=c8);
FullAdder(a=a[9], b=b[9], c=c8, sum=out[9], carry=c9);
FullAdder(a=a[10], b=b[10], c=c9, sum=out[10], carry=c10);
FullAdder(a=a[11], b=b[11], c=c10, sum=out[11], carry=c11);
FullAdder(a=a[12], b=b[12], c=c11, sum=out[12], carry=c12);
FullAdder(a=a[13], b=b[13], c=c12, sum=out[13], carry=c13);
FullAdder(a=a[14], b=b[14], c=c13, sum=out[14], carry=c14);
FullAdder(a=a[15], b=b[15], c=c14, sum=out[15], carry=c15);
}