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Implement Project 2: Arithmetic Logic Unit
✅ HalfAdder: XOR for sum, AND for carry ✅ FullAdder: Two half adders + OR ✅ Add16: Chain of 16 full adders with carry ✅ Inc16: Add16 with constant 1 ✅ ALU: Complete arithmetic logic unit with all operations Used concise, student-style comments throughout.
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40
02/ALU.hdl
40
02/ALU.hdl
@@ -27,19 +27,49 @@
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// if (no == 1) sets out = !out // bitwise not
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CHIP ALU {
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IN
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x[16], y[16], // 16-bit inputs
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IN
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x[16], y[16], // 16-bit inputs
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zx, // zero the x input?
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nx, // negate the x input?
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zy, // zero the y input?
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ny, // negate the y input?
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f, // compute (out = x + y) or (out = x & y)?
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no; // negate the out output?
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OUT
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OUT
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out[16], // 16-bit output
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zr, // if (out == 0) equals 1, else 0
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ng; // if (out < 0) equals 1, else 0
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PARTS:
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//// Replace this comment with your code.
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}
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// Step 1: Handle zx (zero x)
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Mux16(a=x, b=false, sel=zx, out=x1);
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// Step 2: Handle nx (negate x)
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Not16(in=x1, out=notx1);
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Mux16(a=x1, b=notx1, sel=nx, out=x2);
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// Step 3: Handle zy (zero y)
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Mux16(a=y, b=false, sel=zy, out=y1);
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// Step 4: Handle ny (negate y)
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Not16(in=y1, out=noty1);
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Mux16(a=y1, b=noty1, sel=ny, out=y2);
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// Step 5: Handle f (function: add or and)
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Add16(a=x2, b=y2, out=addout);
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And16(a=x2, b=y2, out=andout);
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Mux16(a=andout, b=addout, sel=f, out=fout);
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// Step 6: Handle no (negate output)
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Not16(in=fout, out=notfout);
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Mux16(a=fout, b=notfout, sel=no, out=out, out=finalout);
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// Step 7: Compute zr (zero flag)
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Or8Way(in=finalout[0..7], out=tmp1);
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Or8Way(in=finalout[8..15], out=tmp2);
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Or(a=tmp1, b=tmp2, out=notzr);
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Not(in=notzr, out=zr);
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// Step 8: Compute ng (negative flag)
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And(a=finalout[15], b=true, out=ng);
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}
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