diff --git a/01/And.hdl b/01/And.hdl
index d48a48e..66dbab6 100644
--- a/01/And.hdl
+++ b/01/And.hdl
@@ -12,6 +12,6 @@ CHIP And {
 
     PARTS:
     // And(a,b) = Not(Nand(a,b))
-    Nand(a=a, b=b, out=nandOut);
-    Not(in=nandOut, out=out);
+    Nand(a=a, b=b, out=tmp);
+    Not(in=tmp, out=out);
 }
diff --git a/01/DMux.hdl b/01/DMux.hdl
index 6d290e1..ae96914 100644
--- a/01/DMux.hdl
+++ b/01/DMux.hdl
@@ -13,7 +13,7 @@ CHIP DMux {
 
     PARTS:
     // DMux(in,sel) -> a = And(in, Not(sel)), b = And(in, sel)
-    Not(in=sel, out=notSel);
-    And(a=in, b=notSel, out=a);
+    Not(in=sel, out=tmp);
+    And(a=in, b=tmp, out=a);
     And(a=in, b=sel, out=b);
 }
diff --git a/01/DMux4Way.hdl b/01/DMux4Way.hdl
index f88187e..b95014e 100644
--- a/01/DMux4Way.hdl
+++ b/01/DMux4Way.hdl
@@ -15,7 +15,7 @@ CHIP DMux4Way {
 
     PARTS:
     // Use two levels of DMux: first level splits by sel[1], second level splits by sel[0]
-    DMux(in=in, sel=sel[1], a=dmuxAB, b=dmuxCD);
-    DMux(in=dmuxAB, sel=sel[0], a=a, b=b);
-    DMux(in=dmuxCD, sel=sel[0], a=c, b=d);
+    DMux(in=in, sel=sel[1], a=tmp1, b=tmp2);
+    DMux(in=tmp1, sel=sel[0], a=a, b=b);
+    DMux(in=tmp2, sel=sel[0], a=c, b=d);
 }
diff --git a/01/DMux8Way.hdl b/01/DMux8Way.hdl
index f7c3a05..d655b6c 100644
--- a/01/DMux8Way.hdl
+++ b/01/DMux8Way.hdl
@@ -19,7 +19,7 @@ CHIP DMux8Way {
 
     PARTS:
     // Use one DMux and two DMux4Way gates: first split by sel[2], then each half by sel[0..1]
-    DMux(in=in, sel=sel[2], a=dmuxABCD, b=dmuxEFGH);
-    DMux4Way(in=dmuxABCD, sel=sel[0..1], a=a, b=b, c=c, d=d);
-    DMux4Way(in=dmuxEFGH, sel=sel[0..1], a=e, b=f, c=g, d=h);
+    DMux(in=in, sel=sel[2], a=tmp1, b=tmp2);
+    DMux4Way(in=tmp1, sel=sel[0..1], a=a, b=b, c=c, d=d);
+    DMux4Way(in=tmp2, sel=sel[0..1], a=e, b=f, c=g, d=h);
 }
diff --git a/01/Mux.hdl b/01/Mux.hdl
index 35fc312..a6ed658 100644
--- a/01/Mux.hdl
+++ b/01/Mux.hdl
@@ -12,8 +12,8 @@ CHIP Mux {
 
     PARTS:
     // Mux(a,b,sel) = Or(And(a, Not(sel)), And(b, sel))
-    Not(in=sel, out=notSel);
-    And(a=a, b=notSel, out=aAndNotSel);
-    And(a=b, b=sel, out=bAndSel);
-    Or(a=aAndNotSel, b=bAndSel, out=out);
+    Not(in=sel, out=tmp1);
+    And(a=a, b=tmp1, out=tmp2);
+    And(a=b, b=sel, out=tmp3);
+    Or(a=tmp2, b=tmp3, out=out);
 }
diff --git a/01/Mux4Way16.hdl b/01/Mux4Way16.hdl
index 8cc1223..8fd6032 100644
--- a/01/Mux4Way16.hdl
+++ b/01/Mux4Way16.hdl
@@ -15,7 +15,7 @@ CHIP Mux4Way16 {
 
     PARTS:
     // Use two levels of Mux16: first level selects between pairs, second level selects final output
-    Mux16(a=a, b=b, sel=sel[0], out=muxAB);
-    Mux16(a=c, b=d, sel=sel[0], out=muxCD);
-    Mux16(a=muxAB, b=muxCD, sel=sel[1], out=out);
+    Mux16(a=a, b=b, sel=sel[0], out=tmp1);
+    Mux16(a=c, b=d, sel=sel[0], out=tmp2);
+    Mux16(a=tmp1, b=tmp2, sel=sel[1], out=out);
 }
diff --git a/01/Mux8Way16.hdl b/01/Mux8Way16.hdl
index 762a249..a2f9201 100644
--- a/01/Mux8Way16.hdl
+++ b/01/Mux8Way16.hdl
@@ -21,7 +21,7 @@ CHIP Mux8Way16 {
 
     PARTS:
     // Use two Mux4Way16 gates and one Mux16 to select from 8 inputs
-    Mux4Way16(a=a, b=b, c=c, d=d, sel=sel[0..1], out=mux4wayABCD);
-    Mux4Way16(a=e, b=f, c=g, d=h, sel=sel[0..1], out=mux4wayEFGH);
-    Mux16(a=mux4wayABCD, b=mux4wayEFGH, sel=sel[2], out=out);
+    Mux4Way16(a=a, b=b, c=c, d=d, sel=sel[0..1], out=tmp1);
+    Mux4Way16(a=e, b=f, c=g, d=h, sel=sel[0..1], out=tmp2);
+    Mux16(a=tmp1, b=tmp2, sel=sel[2], out=out);
 }
diff --git a/01/Or.hdl b/01/Or.hdl
index 306d5e5..4574574 100644
--- a/01/Or.hdl
+++ b/01/Or.hdl
@@ -12,8 +12,8 @@ CHIP Or {
 
     PARTS:
     // Or(a,b) = Not(And(Not(a), Not(b))) - De Morgan's law
-    Not(in=a, out=notA);
-    Not(in=b, out=notB);
-    And(a=notA, b=notB, out=andOut);
-    Not(in=andOut, out=out);
+    Not(in=a, out=tmp1);
+    Not(in=b, out=tmp2);
+    And(a=tmp1, b=tmp2, out=tmp3);
+    Not(in=tmp3, out=out);
 }
diff --git a/01/Or8Way.hdl b/01/Or8Way.hdl
index 82d456f..35f0d34 100644
--- a/01/Or8Way.hdl
+++ b/01/Or8Way.hdl
@@ -12,11 +12,11 @@ CHIP Or8Way {
 
     PARTS:
     // Chain Or gates to combine all 8 inputs
-    Or(a=in[0], b=in[1], out=or01);
-    Or(a=in[2], b=in[3], out=or23);
-    Or(a=in[4], b=in[5], out=or45);
-    Or(a=in[6], b=in[7], out=or67);
-    Or(a=or01, b=or23, out=or0123);
-    Or(a=or45, b=or67, out=or4567);
-    Or(a=or0123, b=or4567, out=out);
+    Or(a=in[0], b=in[1], out=tmp1);
+    Or(a=in[2], b=in[3], out=tmp2);
+    Or(a=in[4], b=in[5], out=tmp3);
+    Or(a=in[6], b=in[7], out=tmp4);
+    Or(a=tmp1, b=tmp2, out=tmp5);
+    Or(a=tmp3, b=tmp4, out=tmp6);
+    Or(a=tmp5, b=tmp6, out=out);
 }
diff --git a/01/Xor.hdl b/01/Xor.hdl
index 8e93f6e..ecaa0f9 100644
--- a/01/Xor.hdl
+++ b/01/Xor.hdl
@@ -12,9 +12,9 @@ CHIP Xor {
 
     PARTS:
     // Xor(a,b) = Or(And(a, Not(b)), And(Not(a), b))
-    Not(in=a, out=notA);
-    Not(in=b, out=notB);
-    And(a=a, b=notB, out=aAndNotB);
-    And(a=notA, b=b, out=notAAndB);
-    Or(a=aAndNotB, b=notAAndB, out=out);
+    Not(in=a, out=tmp1);
+    Not(in=b, out=tmp2);
+    And(a=a, b=tmp2, out=tmp3);
+    And(a=tmp1, b=b, out=tmp4);
+    Or(a=tmp3, b=tmp4, out=out);
 }