project02 complete, add .gitignore

02/ALU.hdl

@@ -55,7 +55,8 @@ CHIP ALU {
     Not16(in=y1, out=noty1);
     Mux16(a=y1, b=noty1, sel=ny, out=y2);
 
-    // handle f (add or and)
+    // handle f (+ or &)
+    // do both ops here, is this wasteful? otherwise we run an or, but then we have to "predict"
     Add16(a=x2, b=y2, out=addout);
     And16(a=x2, b=y2, out=andout);
     Mux16(a=andout, b=addout, sel=f, out=fout);

02/Add16.hdl

@@ -27,4 +27,5 @@ CHIP Add16 {
     FullAdder(a=a[13], b=b[13], c=c12, sum=out[13], carry=c13);
     FullAdder(a=a[14], b=b[14], c=c13, sum=out[14], carry=c14);
     FullAdder(a=a[15], b=b[15], c=c14, sum=out[15], carry=c15);
+    // carry 15 is needed but ignored
 }

02/Add16.out

@@ -1,7 +0,0 @@
-|        a         |        b         |       out        |
-| 0000000000000000 | 0000000000000000 | 0000000000000000 |
-| 0000000000000000 | 1111111111111111 | 1111111111111111 |
-| 1111111111111111 | 1111111111111111 | 1111111111111110 |
-| 1010101010101010 | 0101010101010101 | 1111111111111111 |
-| 0011110011000011 | 0000111111110000 | 0100110010110011 |
-| 0001001000110100 | 1001100001110110 | 1010101010101010 |

02/FullAdder.hdl

@@ -11,7 +11,7 @@ CHIP FullAdder {
         carry;   // Left bit of a + b + c
 
     PARTS:
-    HalfAdder(a=a, b=b, sum=tmp1, carry=tmp2);
-    HalfAdder(a=tmp1, b=c, sum=sum, carry=tmp3);
-    Or(a=tmp2, b=tmp3, out=carry);
+    HalfAdder(a=a, b=b, sum=absum, carry=c0);
+    HalfAdder(a=absum, b=c, sum=sum, carry=c1);
+    Or(a=c0, b=c1, out=carry);
 }

02/HalfAdder.out

@@ -1,5 +0,0 @@
-| a | b |sum|car|
-| 0 | 0 | 0 | 0 |
-| 0 | 1 | 1 | 0 |
-| 1 | 0 | 1 | 0 |
-| 1 | 1 | 0 | 1 |

02/Inc16.hdl

@@ -14,3 +14,4 @@ CHIP Inc16 {
     // out = in + 1
     Add16(a=in, b[0]=true, b[1..15]=false, out=out);
 }
+